Interface Trap Charge Effects of Monolithic 3D Junctionless Field-Effect Transistors (JLFET) Inverter.

Tae Jun Ahn, Yun Seop Yu
Author Information
  1. Tae Jun Ahn: Department of Electrical, Electronic and Control Engineering and Institute of Information Technology Convergence (IITC), Hankyong National University, 327 Jungang-ro, Anseong-si, Gyenggi-do 17579, Korea.
  2. Yun Seop Yu: Department of Electrical, Electronic and Control Engineering and Institute of Information Technology Convergence (IITC), Hankyong National University, 327 Jungang-ro, Anseong-si, Gyenggi-do 17579, Korea.

Abstract

We investigated the effect of the interface trap charge in a monolithic three-dimensional inverter structure composing of JLFETs (M3DINV-JLFET), using the interface trap charge distribution extracted in the previous study. The effect of interface trap charge was compared with a conventional M3DINV composing of MOSFETs (M3DINV-MOSFETs) by technology computer-aided design simulation. When the interface trap charges in both M3DINV-JLFET and M3DINV-MOSFET are added, the threshold voltages, on-current levels, and subthreshold swings of both JLFETs and MOSFETs increase, decrease, and increase, respectively, and switching voltages and propagation delays of M3DINV are shifted and increased, respectively. However, since JLFET and MOSFET have different current paths of bulk and interface in channel, respectively, MOSFET is more affected by the interface trap, and M3DINV-JLFET has almost less effect of interface trap at different thickness of interlayer dielectric, compared to M3DINV-MOSFET.

Word Cloud

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